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author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-28 12:42:37 +0000 |
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committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-28 12:42:37 +0000 |
commit | 9d419d3b0cfda0f85d88633bd8620cd65ccb0498 (patch) | |
tree | e1fa028a9c3a8d514e67b9bac321519331979dea /llvm/lib/CodeGen/VirtRegMap.cpp | |
parent | 8dc603b03147c91ff4e66b8bfc934aad6c4cb4b3 (diff) | |
download | bcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.tar.gz bcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.zip |
[CodeGen] Rename functions PrintReg* to printReg*
LLVM Coding Standards:
Function names should be verb phrases (as they represent actions), and
command-like function should be imperative. The name should be camel
case, and start with a lower case letter (e.g. openFile() or isFoo()).
Differential Revision: https://reviews.llvm.org/D40416
llvm-svn: 319168
Diffstat (limited to 'llvm/lib/CodeGen/VirtRegMap.cpp')
-rw-r--r-- | llvm/lib/CodeGen/VirtRegMap.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp index 97b8e0cef71..1533abde87e 100644 --- a/llvm/lib/CodeGen/VirtRegMap.cpp +++ b/llvm/lib/CodeGen/VirtRegMap.cpp @@ -140,8 +140,8 @@ void VirtRegMap::print(raw_ostream &OS, const Module*) const { for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) { unsigned Reg = TargetRegisterInfo::index2VirtReg(i); if (Virt2PhysMap[Reg] != (unsigned)VirtRegMap::NO_PHYS_REG) { - OS << '[' << PrintReg(Reg, TRI) << " -> " - << PrintReg(Virt2PhysMap[Reg], TRI) << "] " + OS << '[' << printReg(Reg, TRI) << " -> " + << printReg(Virt2PhysMap[Reg], TRI) << "] " << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; } } @@ -149,7 +149,7 @@ void VirtRegMap::print(raw_ostream &OS, const Module*) const { for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) { unsigned Reg = TargetRegisterInfo::index2VirtReg(i); if (Virt2StackSlotMap[Reg] != VirtRegMap::NO_STACK_SLOT) { - OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg] + OS << '[' << printReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg] << "] " << TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n"; } } |