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| author | Chris Lattner <sabre@nondot.org> | 2005-01-22 18:38:13 +0000 | 
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-01-22 18:38:13 +0000 | 
| commit | 9ceb7c8f23b8d1212b533b3273fea7da0bcf0c2c (patch) | |
| tree | 2c55aa9c10bfd24c9a69eacadb72177a36426399 /llvm/lib/CodeGen/UnreachableBlockElim.cpp | |
| parent | b6f5d9a82a2ae4773cb2ab67c87ce2c85facd0cd (diff) | |
| download | bcm5719-llvm-9ceb7c8f23b8d1212b533b3273fea7da0bcf0c2c.tar.gz bcm5719-llvm-9ceb7c8f23b8d1212b533b3273fea7da0bcf0c2c.zip | |
Implement factoring of instruction pattern strings.  In particular, instead of
emitting code like this:
  case PPC::ADD: O  << "add ";  printOperand(MI, 0, MVT::i64); O  << ", ";  prin
tOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '\n
'; break;
  case PPC::ADDC: O  << "addc ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
  case PPC::ADDE: O  << "adde ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
...
Emit code like this:
  case PPC::ADD:
  case PPC::ADDC:
  case PPC::ADDE:
  ...
    switch (MI->getOpcode()) {
    case PPC::ADD: O << "add "; break;
    case PPC::ADDC: O << "addc "; break;
    case PPC::ADDE: O << "adde "; break;
    ...
    }
    printOperand(MI, 0, MVT::i64);
    O << ", ";
    printOperand(MI, 1, MVT::i64);
    O << ", ";
    printOperand(MI, 2, MVT::i64);
    O << "\n";
    break;
This shrinks the PPC asm writer from 24785->15205 bytes (even though the new
asmwriter has much more whitespace than the old one), and the X86 printers shrink
quite a bit too.  The important implication of this is that GCC no longer hits swap
when building the PPC backend in optimized mode.  Thus this fixes PR448.
-Chris
llvm-svn: 19755
Diffstat (limited to 'llvm/lib/CodeGen/UnreachableBlockElim.cpp')
0 files changed, 0 insertions, 0 deletions

