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| author | Sanjoy Das <sanjoy@playingwithpointers.com> | 2017-06-19 22:35:48 +0000 |
|---|---|---|
| committer | Sanjoy Das <sanjoy@playingwithpointers.com> | 2017-06-19 22:35:48 +0000 |
| commit | 7ba830d61cfe8b4cfd8c61b7bbb6e2fa89677952 (patch) | |
| tree | bdd8b29341a4eb71b0d6a4c233deebb65a7f4d1b /llvm/lib/CodeGen/TargetSubtargetInfo.cpp | |
| parent | de6cce2236c53f08107ab60dc47f3b7e4f5cc939 (diff) | |
| download | bcm5719-llvm-7ba830d61cfe8b4cfd8c61b7bbb6e2fa89677952.tar.gz bcm5719-llvm-7ba830d61cfe8b4cfd8c61b7bbb6e2fa89677952.zip | |
Fix machine instruction in test case
The AMD64rm instruction used in the test case was incorrect. Since
the first input register to AND64rm is tied to output register, they
must be the same.
Thanks for Jesper Antonsson for pointing this out!
llvm-svn: 305756
Diffstat (limited to 'llvm/lib/CodeGen/TargetSubtargetInfo.cpp')
0 files changed, 0 insertions, 0 deletions
