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author | Sanjay Patel <spatel@rotateright.com> | 2018-06-05 23:34:45 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2018-06-05 23:34:45 +0000 |
commit | 59313be8d3389918d0a1bf704bcbdd889c073ffc (patch) | |
tree | bcbbfe3bffbf20e582318ed609de8a66352d31cd /llvm/lib/CodeGen/TargetSubtargetInfo.cpp | |
parent | 6b5b5ce06c2d294d093a3ad782e7546d5fccd25b (diff) | |
download | bcm5719-llvm-59313be8d3389918d0a1bf704bcbdd889c073ffc.tar.gz bcm5719-llvm-59313be8d3389918d0a1bf704bcbdd889c073ffc.zip |
[CodeGen] assume max/default throughput for unspecified instructions
This is a fix for the problem arising in D47374 (PR37678):
https://bugs.llvm.org/show_bug.cgi?id=37678
We may not have throughput info because it's not specified in the model
or it's not available with variant scheduling, so assume that those
instructions can execute/complete at max-issue-width.
Differential Revision: https://reviews.llvm.org/D47723
llvm-svn: 334055
Diffstat (limited to 'llvm/lib/CodeGen/TargetSubtargetInfo.cpp')
-rw-r--r-- | llvm/lib/CodeGen/TargetSubtargetInfo.cpp | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp index 97ca707a738..fa29c05fd6c 100644 --- a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp +++ b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp @@ -67,13 +67,12 @@ bool TargetSubtargetInfo::useAA() const { return false; } -static std::string createSchedInfoStr(unsigned Latency, - Optional<double> RThroughput) { +static std::string createSchedInfoStr(unsigned Latency, double RThroughput) { static const char *SchedPrefix = " sched: ["; std::string Comment; raw_string_ostream CS(Comment); - if (RThroughput.hasValue()) - CS << SchedPrefix << Latency << format(":%2.2f", RThroughput.getValue()) + if (RThroughput != 0.0) + CS << SchedPrefix << Latency << format(":%2.2f", RThroughput) << "]"; else CS << SchedPrefix << Latency << ":?]"; @@ -90,7 +89,7 @@ std::string TargetSubtargetInfo::getSchedInfoStr(const MachineInstr &MI) const { TargetSchedModel TSchedModel; TSchedModel.init(this); unsigned Latency = TSchedModel.computeInstrLatency(&MI); - Optional<double> RThroughput = TSchedModel.computeReciprocalThroughput(&MI); + double RThroughput = TSchedModel.computeReciprocalThroughput(&MI); return createSchedInfoStr(Latency, RThroughput); } @@ -109,8 +108,7 @@ std::string TargetSubtargetInfo::getSchedInfoStr(MCInst const &MCI) const { getInstrInfo()->get(MCI.getOpcode()).getSchedClass()); } else return std::string(); - Optional<double> RThroughput = - TSchedModel.computeReciprocalThroughput(MCI); + double RThroughput = TSchedModel.computeReciprocalThroughput(MCI); return createSchedInfoStr(Latency, RThroughput); } |