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| author | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2014-08-04 21:25:23 +0000 |
| commit | d913448b38bab6ace92ae5057b917eb57035f83b (patch) | |
| tree | f2050928fa5994c44fab60d66e7d89e7cc7d7a4f /llvm/lib/CodeGen/TargetSchedule.cpp | |
| parent | acc8ef273b1c3796b0fc7f19aa347115b4bc2ea4 (diff) | |
| download | bcm5719-llvm-d913448b38bab6ace92ae5057b917eb57035f83b.tar.gz bcm5719-llvm-d913448b38bab6ace92ae5057b917eb57035f83b.zip | |
Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.
llvm-svn: 214781
Diffstat (limited to 'llvm/lib/CodeGen/TargetSchedule.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/TargetSchedule.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp index f42946f35ef..b176729027a 100644 --- a/llvm/lib/CodeGen/TargetSchedule.cpp +++ b/llvm/lib/CodeGen/TargetSchedule.cpp @@ -290,7 +290,8 @@ computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, // for predicated defs. unsigned Reg = DefMI->getOperand(DefOperIdx).getReg(); const MachineFunction &MF = *DefMI->getParent()->getParent(); - const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); + const TargetRegisterInfo *TRI = + MF.getTarget().getSubtargetImpl()->getRegisterInfo(); if (!DepMI->readsRegister(Reg, TRI) && TII->isPredicated(DepMI)) return computeInstrLatency(DefMI); |
