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authorDuncan P. N. Exon Smith <dexonsmith@apple.com>2016-02-23 02:46:52 +0000
committerDuncan P. N. Exon Smith <dexonsmith@apple.com>2016-02-23 02:46:52 +0000
commit6307eb551822a925c3a39ae1c814e4b46893a4b4 (patch)
tree08715dd004161c2809f203f3c19161af6261cfa3 /llvm/lib/CodeGen/TargetSchedule.cpp
parentb3613fce19b0fd154d38b044196357afdc335f8d (diff)
downloadbcm5719-llvm-6307eb551822a925c3a39ae1c814e4b46893a4b4.tar.gz
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CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of `MachineInstr*` in the functions related to predicated instructions (I'll try to come back later and get some of the rest). All of these functions require non-null parameters already, so references are more clear. As a bonus, this happens to factor away a host of implicit iterator => pointer conversions. No functionality change intended. llvm-svn: 261605
Diffstat (limited to 'llvm/lib/CodeGen/TargetSchedule.cpp')
-rw-r--r--llvm/lib/CodeGen/TargetSchedule.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp
index 1c4558cea5f..f5181a362d7 100644
--- a/llvm/lib/CodeGen/TargetSchedule.cpp
+++ b/llvm/lib/CodeGen/TargetSchedule.cpp
@@ -282,7 +282,7 @@ computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
unsigned Reg = DefMI->getOperand(DefOperIdx).getReg();
const MachineFunction &MF = *DefMI->getParent()->getParent();
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
- if (!DepMI->readsRegister(Reg, TRI) && TII->isPredicated(DepMI))
+ if (!DepMI->readsRegister(Reg, TRI) && TII->isPredicated(*DepMI))
return computeInstrLatency(DefMI);
// If we have a per operand scheduling model, check if this def is writing
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