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author | Matthias Braun <matze@braunis.de> | 2015-05-14 18:01:13 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2015-05-14 18:01:13 +0000 |
commit | 42e1e66e55bd297a2d16d0ff5f476f79ad3f08f6 (patch) | |
tree | c7f733c0cb06dcdc4819e708ea14c37c4bbe5dda /llvm/lib/CodeGen/TargetSchedule.cpp | |
parent | bff3a7eb3d7ad23064f86c1e641ae4da4450f16a (diff) | |
download | bcm5719-llvm-42e1e66e55bd297a2d16d0ff5f476f79ad3f08f6.tar.gz bcm5719-llvm-42e1e66e55bd297a2d16d0ff5f476f79ad3f08f6.zip |
TargetSchedule: factor out common code; NFC
llvm-svn: 237376
Diffstat (limited to 'llvm/lib/CodeGen/TargetSchedule.cpp')
-rw-r--r-- | llvm/lib/CodeGen/TargetSchedule.cpp | 38 |
1 files changed, 17 insertions, 21 deletions
diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp index ef2dab1287f..c3fdd73b055 100644 --- a/llvm/lib/CodeGen/TargetSchedule.cpp +++ b/llvm/lib/CodeGen/TargetSchedule.cpp @@ -224,6 +224,19 @@ unsigned TargetSchedModel::computeOperandLatency( return DefMI->isTransient() ? 0 : TII->defaultDefLatency(SchedModel, DefMI); } +unsigned +TargetSchedModel::computeInstrLatency(const MCSchedClassDesc &SCDesc) const { + unsigned Latency = 0; + for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries; + DefIdx != DefEnd; ++DefIdx) { + // Lookup the definition's write latency in SubtargetInfo. + const MCWriteLatencyEntry *WLEntry = + STI->getWriteLatencyEntry(&SCDesc, DefIdx); + Latency = std::max(Latency, capLatency(WLEntry->Cycles)); + } + return Latency; +} + unsigned TargetSchedModel::computeInstrLatency(unsigned Opcode) const { assert(hasInstrSchedModel() && "Only call this function with a SchedModel"); @@ -231,16 +244,8 @@ unsigned TargetSchedModel::computeInstrLatency(unsigned Opcode) const { const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SCIdx); unsigned Latency = 0; - if (SCDesc->isValid() && !SCDesc->isVariant()) { - for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries; - DefIdx != DefEnd; ++DefIdx) { - // Lookup the definition's write latency in SubtargetInfo. - const MCWriteLatencyEntry *WLEntry = - STI->getWriteLatencyEntry(SCDesc, DefIdx); - Latency = std::max(Latency, capLatency(WLEntry->Cycles)); - } - return Latency; - } + if (SCDesc->isValid() && !SCDesc->isVariant()) + return computeInstrLatency(*SCDesc); assert(Latency && "No MI sched latency"); return 0; @@ -257,17 +262,8 @@ TargetSchedModel::computeInstrLatency(const MachineInstr *MI, if (hasInstrSchedModel()) { const MCSchedClassDesc *SCDesc = resolveSchedClass(MI); - if (SCDesc->isValid()) { - unsigned Latency = 0; - for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries; - DefIdx != DefEnd; ++DefIdx) { - // Lookup the definition's write latency in SubtargetInfo. - const MCWriteLatencyEntry *WLEntry = - STI->getWriteLatencyEntry(SCDesc, DefIdx); - Latency = std::max(Latency, capLatency(WLEntry->Cycles)); - } - return Latency; - } + if (SCDesc->isValid()) + return computeInstrLatency(*SCDesc); } return TII->defaultDefLatency(SchedModel, MI); } |