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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2019-08-23 19:59:23 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2019-08-23 19:59:23 +0000 |
| commit | dc5f805d31f62e094bd3eb105b47620633f65e5b (patch) | |
| tree | 90c02e8b643b8f5dbf98ac823afb2bfd07bdabca /llvm/lib/CodeGen/TargetPassConfig.cpp | |
| parent | bc173d4c515a461d2177121da8ef7657b6c5b8a7 (diff) | |
| download | bcm5719-llvm-dc5f805d31f62e094bd3eb105b47620633f65e5b.tar.gz bcm5719-llvm-dc5f805d31f62e094bd3eb105b47620633f65e5b.zip | |
Do a sweep of symbol internalization. NFC.
llvm-svn: 369803
Diffstat (limited to 'llvm/lib/CodeGen/TargetPassConfig.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/TargetPassConfig.cpp | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp index 953d307cf59..ba780e718bb 100644 --- a/llvm/lib/CodeGen/TargetPassConfig.cpp +++ b/llvm/lib/CodeGen/TargetPassConfig.cpp @@ -49,9 +49,10 @@ using namespace llvm; -cl::opt<bool> EnableIPRA("enable-ipra", cl::init(false), cl::Hidden, - cl::desc("Enable interprocedural register allocation " - "to reduce load/store at procedure calls.")); +static cl::opt<bool> + EnableIPRA("enable-ipra", cl::init(false), cl::Hidden, + cl::desc("Enable interprocedural register allocation " + "to reduce load/store at procedure calls.")); static cl::opt<bool> DisablePostRASched("disable-post-ra", cl::Hidden, cl::desc("Disable Post Regalloc Scheduler")); static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden, @@ -152,8 +153,10 @@ static cl::opt<GlobalISelAbortMode> EnableGlobalISelAbort( // substitutePass(&PostRASchedulerID, &PostMachineSchedulerID). // Targets can return true in targetSchedulesPostRAScheduling() and // insert a PostRA scheduling pass wherever it wants. -cl::opt<bool> MISchedPostRA("misched-postra", cl::Hidden, - cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)")); +static cl::opt<bool> MISchedPostRA( + "misched-postra", cl::Hidden, + cl::desc( + "Run MachineScheduler post regalloc (independent of preRA sched)")); // Experimental option to run live interval analysis early. static cl::opt<bool> EarlyLiveIntervals("early-live-intervals", cl::Hidden, @@ -175,10 +178,10 @@ static cl::opt<CFLAAType> UseCFLAA( /// Option names for limiting the codegen pipeline. /// Those are used in error reporting and we didn't want /// to duplicate their names all over the place. -const char *StartAfterOptName = "start-after"; -const char *StartBeforeOptName = "start-before"; -const char *StopAfterOptName = "stop-after"; -const char *StopBeforeOptName = "stop-before"; +static const char *StartAfterOptName = "start-after"; +static const char *StartBeforeOptName = "start-before"; +static const char *StopAfterOptName = "stop-after"; +static const char *StopBeforeOptName = "stop-before"; static cl::opt<std::string> StartAfterOpt(StringRef(StartAfterOptName), |
