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| author | Geoff Berry <gberry@codeaurora.org> | 2017-02-05 18:28:14 +0000 |
|---|---|---|
| committer | Geoff Berry <gberry@codeaurora.org> | 2017-02-05 18:28:14 +0000 |
| commit | 76ca8c2b347d6b2792ab31763c38cdb3b8b6532b (patch) | |
| tree | 29ababdfed3913ed0d6a9e742278f6f010d4e9ce /llvm/lib/CodeGen/TargetPassConfig.cpp | |
| parent | 361f8d786909ea3bfecc3bc93558e3708159e670 (diff) | |
| download | bcm5719-llvm-76ca8c2b347d6b2792ab31763c38cdb3b8b6532b.tar.gz bcm5719-llvm-76ca8c2b347d6b2792ab31763c38cdb3b8b6532b.zip | |
[SelectionDAG] In InstrEmitter, handle EXTRACT_SUBREG of a physical register.
Summary:
Without this change, the getVR() call would hit an assert since it was
being passed a physical register.
Update the AArch64/ldst-opt.ll test with a case that triggers this
behavior by adding a run with strict-align, which causes an unaligned
STR XZR instruction to be split into byte stores, creating an
EXTRACT_SUBREG of XZR that triggers the original problem.
Reviewers: bogner, qcolombet, MatzeB, atrick
Subscribers: aemerson, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D29495
llvm-svn: 294129
Diffstat (limited to 'llvm/lib/CodeGen/TargetPassConfig.cpp')
0 files changed, 0 insertions, 0 deletions
