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| author | Adam Nemet <anemet@apple.com> | 2017-04-13 23:32:47 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2017-04-13 23:32:47 +0000 |
| commit | c5779460f4cbea38dc77911b667a6d76c79c1a3f (patch) | |
| tree | 9c3ea8a5a6c33e1ec0958d92123acec18de886d5 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | d24aeb20fc3ac57a2180380edbeb3c0fa0cd03b2 (diff) | |
| download | bcm5719-llvm-c5779460f4cbea38dc77911b667a6d76c79c1a3f.tar.gz bcm5719-llvm-c5779460f4cbea38dc77911b667a6d76c79c1a3f.zip | |
[AArch64] Avoid partial register writes on lane 0 of BUILD_VECTOR for i8/i16/f16
This further improves Ahmed's change in rL299482. See the new comment for the
rationale.
The patch recovers most of the regression for bzip2 after D31965. We're down
to +2.68% from +6.97%.
Differential Revision: https://reviews.llvm.org/D32028
llvm-svn: 300276
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions
