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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-03 22:50:32 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-03 22:50:32 +0000 |
| commit | 967c2f5dee4894c74365940997457827c666752f (patch) | |
| tree | d9af7fe638b4b07583b4ba13ff3bd34adce03a26 /llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | |
| parent | 3473c72aab2a9a8ce89ed85cc52677d37a0f91de (diff) | |
| download | bcm5719-llvm-967c2f5dee4894c74365940997457827c666752f.tar.gz bcm5719-llvm-967c2f5dee4894c74365940997457827c666752f.zip | |
AMDGPU: Fix asserts on invalid register ranges
If the requested SGPR was not actually aligned, it was
accepted and rounded down instead of rejected.
Also fix an assert if the range is an invalid size.
llvm-svn: 252009
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp')
0 files changed, 0 insertions, 0 deletions
