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| author | Francis Visoiu Mistrih <fvisoiumistrih@apple.com> | 2017-05-17 01:07:53 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <fvisoiumistrih@apple.com> | 2017-05-17 01:07:53 +0000 |
| commit | b52e0366008436f6f994ce94cb6ad0f51d65ba8a (patch) | |
| tree | c6067844f69347f2f77a9094caff2644ddcffcf6 /llvm/lib/CodeGen/TargetLoweringBase.cpp | |
| parent | de83fec0299ac4bae25d7e36ef30feddba2b48ad (diff) | |
| download | bcm5719-llvm-b52e0366008436f6f994ce94cb6ad0f51d65ba8a.tar.gz bcm5719-llvm-b52e0366008436f6f994ce94cb6ad0f51d65ba8a.zip | |
BitVector: add iterators for set bits
Differential revision: https://reviews.llvm.org/D32060
llvm-svn: 303227
Diffstat (limited to 'llvm/lib/CodeGen/TargetLoweringBase.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/TargetLoweringBase.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index 39aa946fa84..5f63fd4320b 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -1312,7 +1312,7 @@ TargetLoweringBase::findRepresentativeClass(const TargetRegisterInfo *TRI, // Find the first legal register class with the largest spill size. const TargetRegisterClass *BestRC = RC; - for (int i = SuperRegRC.find_first(); i >= 0; i = SuperRegRC.find_next(i)) { + for (unsigned i : SuperRegRC.set_bits()) { const TargetRegisterClass *SuperRC = TRI->getRegClass(i); // We want the largest possible spill size. if (TRI->getSpillSize(*SuperRC) <= TRI->getSpillSize(*BestRC)) |
