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authorEvan Cheng <evan.cheng@apple.com>2010-09-10 01:29:16 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-09-10 01:29:16 +0000
commitbf4070756f4acbae9a556c56003f0dd71521288e (patch)
tree73c9f913ec61f913b9eff7f8f6cd745bc94cb2ad /llvm/lib/CodeGen/TargetInstrInfoImpl.cpp
parent516484c71e6322a3d17ce91c7107afefb35e972f (diff)
downloadbcm5719-llvm-bf4070756f4acbae9a556c56003f0dd71521288e.tar.gz
bcm5719-llvm-bf4070756f4acbae9a556c56003f0dd71521288e.zip
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. llvm-svn: 113570
Diffstat (limited to 'llvm/lib/CodeGen/TargetInstrInfoImpl.cpp')
-rw-r--r--llvm/lib/CodeGen/TargetInstrInfoImpl.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp
index 6e4a0d837ec..d106ead9b46 100644
--- a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp
@@ -416,6 +416,6 @@ bool TargetInstrInfoImpl::isSchedulingBoundary(const MachineInstr *MI,
// Default implementation of CreateTargetPostRAHazardRecognizer.
ScheduleHazardRecognizer *TargetInstrInfoImpl::
-CreateTargetPostRAHazardRecognizer(const InstrItineraryData &II) const {
+CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II) const {
return (ScheduleHazardRecognizer *)new PostRAHazardRecognizer(II);
}
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