From bf4070756f4acbae9a556c56003f0dd71521288e Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 10 Sep 2010 01:29:16 +0000 Subject: Teach if-converter to be more careful with predicating instructions that would take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. llvm-svn: 113570 --- llvm/lib/CodeGen/TargetInstrInfoImpl.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/lib/CodeGen/TargetInstrInfoImpl.cpp') diff --git a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp index 6e4a0d837ec..d106ead9b46 100644 --- a/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp +++ b/llvm/lib/CodeGen/TargetInstrInfoImpl.cpp @@ -416,6 +416,6 @@ bool TargetInstrInfoImpl::isSchedulingBoundary(const MachineInstr *MI, // Default implementation of CreateTargetPostRAHazardRecognizer. ScheduleHazardRecognizer *TargetInstrInfoImpl:: -CreateTargetPostRAHazardRecognizer(const InstrItineraryData &II) const { +CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II) const { return (ScheduleHazardRecognizer *)new PostRAHazardRecognizer(II); } -- cgit v1.2.3