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| author | Jun Bum Lim <junbuml@codeaurora.org> | 2015-10-27 19:16:03 +0000 |
|---|---|---|
| committer | Jun Bum Lim <junbuml@codeaurora.org> | 2015-10-27 19:16:03 +0000 |
| commit | c9879ecfbc46fbaeb0fff256e24267d191f0534c (patch) | |
| tree | 5ca02c214763fc2b04f575b33ab58fdc273e1e36 /llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp | |
| parent | 6f49ecc3c4e5534210610ba5879559064e9c2b3f (diff) | |
| download | bcm5719-llvm-c9879ecfbc46fbaeb0fff256e24267d191f0534c.tar.gz bcm5719-llvm-c9879ecfbc46fbaeb0fff256e24267d191f0534c.zip | |
[AArch64]Merge halfword loads into a 32-bit load
This recommits r250719, which caused a failure in SPEC2000.gcc
because of the incorrect insert point for the new wider load.
Convert two halfword loads into a single 32-bit word load with bitfield extract
instructions. For example :
ldrh w0, [x2]
ldrh w1, [x2, #2]
becomes
ldr w0, [x2]
ubfx w1, w0, #16, #16
and w0, w0, #ffff
llvm-svn: 251438
Diffstat (limited to 'llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp')
0 files changed, 0 insertions, 0 deletions
