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authorArnold Schwaighofer <aschwaighofer@apple.com>2016-10-07 22:06:55 +0000
committerArnold Schwaighofer <aschwaighofer@apple.com>2016-10-07 22:06:55 +0000
commit3f25658143b0b9eadc31f2213d845e9d075511ca (patch)
treeb958a3e85e8ccc7493cc6f26bed3052a0f403325 /llvm/lib/CodeGen/TailDuplicator.cpp
parent087f1fbb53cd4a3ae73eb0be3bd989d4a6a1546c (diff)
downloadbcm5719-llvm-3f25658143b0b9eadc31f2213d845e9d075511ca.tar.gz
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swifterror: Don't compute swifterror vregs during instruction selection
The code used llvm basic block predecessors to decided where to insert phi nodes. Instruction selection can and will liberally insert new machine basic block predecessors. There is not a guaranteed one-to-one mapping from pred. llvm basic blocks and machine basic blocks. Therefore the current approach does not work as it assumes we can mark predecessor machine basic block as needing a copy, and needs to know the set of all predecessor machine basic blocks to decide when to insert phis. Instead of computing the swifterror vregs as we select instructions, propagate them at the end of instruction selection when the MBB CFG is complete. When an instruction needs a swifterror vreg and we don't know the value yet, generate a new vreg and remember this "upward exposed" use, and reconcile this at the end of instruction selection. This will only happen if the target supports promoting swifterror parameters to registers and the swifterror attribute is used. rdar://28300923 llvm-svn: 283617
Diffstat (limited to 'llvm/lib/CodeGen/TailDuplicator.cpp')
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