diff options
author | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-27 06:40:41 +0000 |
---|---|---|
committer | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-27 06:40:41 +0000 |
commit | 3ac9cc615694361653d51148995f1fead69f9487 (patch) | |
tree | 940feeaeb882518bc7728d0809085607793097c2 /llvm/lib/CodeGen/SplitKit.cpp | |
parent | 0bed1eab3937cc9c78baaef88ae85da9f3f91402 (diff) | |
download | bcm5719-llvm-3ac9cc615694361653d51148995f1fead69f9487.tar.gz bcm5719-llvm-3ac9cc615694361653d51148995f1fead69f9487.zip |
CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC
Take MachineInstr by reference instead of by pointer in SlotIndexes and
the SlotIndex wrappers in LiveIntervals. The MachineInstrs here are
never null, so this cleans up the API a bit. It also incidentally
removes a few implicit conversions from MachineInstrBundleIterator to
MachineInstr* (see PR26753).
At a couple of call sites it was convenient to convert to a range-based
for loop over MachineBasicBlock::instr_begin/instr_end, so I added
MachineBasicBlock::instrs.
llvm-svn: 262115
Diffstat (limited to 'llvm/lib/CodeGen/SplitKit.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SplitKit.cpp | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/SplitKit.cpp b/llvm/lib/CodeGen/SplitKit.cpp index 854fd4b9eea..5be82b85272 100644 --- a/llvm/lib/CodeGen/SplitKit.cpp +++ b/llvm/lib/CodeGen/SplitKit.cpp @@ -68,7 +68,7 @@ SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) { if (FirstTerm == MBB->end()) LSP.first = MBBEnd; else - LSP.first = LIS.getInstructionIndex(FirstTerm); + LSP.first = LIS.getInstructionIndex(*FirstTerm); // If there is a landing pad successor, also find the call instruction. if (!LPad) @@ -79,7 +79,7 @@ SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) { I != E;) { --I; if (I->isCall()) { - LSP.second = LIS.getInstructionIndex(I); + LSP.second = LIS.getInstructionIndex(*I); break; } } @@ -129,7 +129,7 @@ void SplitAnalysis::analyzeUses() { const MachineRegisterInfo &MRI = MF.getRegInfo(); for (MachineOperand &MO : MRI.use_nodbg_operands(CurLI->reg)) if (!MO.isUndef()) - UseSlots.push_back(LIS.getInstructionIndex(MO.getParent()).getRegSlot()); + UseSlots.push_back(LIS.getInstructionIndex(*MO.getParent()).getRegSlot()); array_pod_sort(UseSlots.begin(), UseSlots.end()); @@ -438,8 +438,9 @@ VNInfo *SplitEditor::defFromParent(unsigned RegIdx, // Can't remat, just insert a copy from parent. CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg) .addReg(Edit->getReg()); - Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late) - .getRegSlot(); + Def = LIS.getSlotIndexes() + ->insertMachineInstrInMaps(*CopyMI, Late) + .getRegSlot(); ++NumCopies; } @@ -638,7 +639,7 @@ void SplitEditor::removeBackCopies(SmallVectorImpl<VNInfo*> &Copies) { DEBUG(dbgs() << "Removing " << Def << '\t' << *MI); LIS.removeVRegDefAt(*LI, Def); - LIS.RemoveMachineInstrFromMaps(MI); + LIS.RemoveMachineInstrFromMaps(*MI); MI->eraseFromParent(); // Adjust RegAssign if a register assignment is killed at Def. We want to @@ -654,7 +655,7 @@ void SplitEditor::removeBackCopies(SmallVectorImpl<VNInfo*> &Copies) { DEBUG(dbgs() << " cannot find simple kill of RegIdx " << RegIdx << '\n'); forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def)); } else { - SlotIndex Kill = LIS.getInstructionIndex(MBBI).getRegSlot(); + SlotIndex Kill = LIS.getInstructionIndex(*MBBI).getRegSlot(); DEBUG(dbgs() << " move kill to " << Kill << '\t' << *MBBI); AssignI.setStop(Kill); } @@ -964,7 +965,7 @@ void SplitEditor::rewriteAssigned(bool ExtendRanges) { // <undef> operands don't really read the register, so it doesn't matter // which register we choose. When the use operand is tied to a def, we must // use the same register as the def, so just do that always. - SlotIndex Idx = LIS.getInstructionIndex(MI); + SlotIndex Idx = LIS.getInstructionIndex(*MI); if (MO.isDef() || MO.isUndef()) Idx = Idx.getRegSlot(MO.isEarlyClobber()); |