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| author | Craig Topper <craig.topper@intel.com> | 2018-03-01 22:15:39 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-03-01 22:15:39 +0000 |
| commit | eedfbc4ab7df2b9ddeb0674e8ef75c3cac550384 (patch) | |
| tree | 8ebbc8860e4b6ab916701a0811f56702a1249b14 /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | e57167fab6b46b042e5a90c834c4835222722e25 (diff) | |
| download | bcm5719-llvm-eedfbc4ab7df2b9ddeb0674e8ef75c3cac550384.tar.gz bcm5719-llvm-eedfbc4ab7df2b9ddeb0674e8ef75c3cac550384.zip | |
[SelectionDAG] Support some SimplifySetCC cases for comparing against vector splats of constants.
This supports things like
(setcc ugt X, 0) -> (setcc ne X, 0)
I've restricted to only make changes to vectors before legalize ops because I doubt all targets have accurate condition code legality information for vectors given how little we did before.
Differential Revision: https://reviews.llvm.org/D42948
llvm-svn: 326495
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index cb737dcd787..75a2be4659f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2221,7 +2221,8 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, if (C1 == MinVal) return DAG.getBoolConstant(false, dl, VT, OpVT); // X < MIN --> false - if (!VT.isVector()) { // TODO: Support this for vectors. + // TODO: Support this for vectors after legalize ops. + if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { // Canonicalize setlt X, Max --> setne X, Max if (C1 == MaxVal) return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE); @@ -2238,7 +2239,8 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, if (C1 == MaxVal) return DAG.getBoolConstant(false, dl, VT, OpVT); // X > MAX --> false - if (!VT.isVector()) { // TODO: Support this for vectors. + // TODO: Support this for vectors after legalize ops. + if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { // Canonicalize setgt X, Min --> setne X, Min if (C1 == MinVal) return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE); @@ -2253,7 +2255,8 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, // If we have "setcc X, C0", check to see if we can shrink the immediate // by changing cc. - if (!VT.isVector()) { // TODO: Support this for vectors. + // TODO: Support this for vectors after legalize ops. + if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { // SETUGT X, SINTMAX -> SETLT X, 0 if (Cond == ISD::SETUGT && C1 == APInt::getSignedMaxValue(OperandBitSize)) |
