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| author | Stephen Lin <stephenwlin@gmail.com> | 2013-07-08 00:37:03 +0000 |
|---|---|---|
| committer | Stephen Lin <stephenwlin@gmail.com> | 2013-07-08 00:37:03 +0000 |
| commit | cfe7f352c798cf705b1a946ff54a8d8558aba322 (patch) | |
| tree | 883331c86f81a4061b31ba9005718d2559f7570d /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | ea5092a3b05ef184f0f73ccb8a4820740f0c2744 (diff) | |
| download | bcm5719-llvm-cfe7f352c798cf705b1a946ff54a8d8558aba322.tar.gz bcm5719-llvm-cfe7f352c798cf705b1a946ff54a8d8558aba322.zip | |
Remove trailing whitespace from SelectionDAG/*.cpp
llvm-svn: 185780
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 69ddea4d8eb..e3c63066dec 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -510,7 +510,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, // into an AND, as we know the bits will be cleared. // e.g. (X | C1) ^ C2 --> (X | C1) & ~C2 iff (C1&C2) == C2 // NB: it is okay if more bits are known than are requested - if ((NewMask & (KnownZero|KnownOne)) == NewMask) { // all known on one side + if ((NewMask & (KnownZero|KnownOne)) == NewMask) { // all known on one side if (KnownOne == KnownOne2) { // set bits are the same on both sides EVT VT = Op.getValueType(); SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT); |
