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| author | Nick Lewycky <nicholas@mxc.ca> | 2015-05-13 23:41:47 +0000 |
|---|---|---|
| committer | Nick Lewycky <nicholas@mxc.ca> | 2015-05-13 23:41:47 +0000 |
| commit | 37a175007bacf8d6db1f01d6a720613f4e41ce93 (patch) | |
| tree | 1032616a3703ca6e1b413a2b32ee5987727fe2a8 /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | da04cb26435c91ba504090bf03905fca3b67f7bb (diff) | |
| download | bcm5719-llvm-37a175007bacf8d6db1f01d6a720613f4e41ce93.tar.gz bcm5719-llvm-37a175007bacf8d6db1f01d6a720613f4e41ce93.zip | |
Revert r237046. See the testcase on the thread where r237046 was committed.
llvm-svn: 237317
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 70d04c02580..38e39e52e81 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2660,9 +2660,8 @@ SDValue TargetLowering::BuildExactSDIV(SDValue Op1, SDValue Op2, SDLoc dl, // TODO: For UDIV use SRL instead of SRA. SDValue Amt = DAG.getConstant(ShAmt, dl, getShiftAmountTy(Op1.getValueType())); - SDNodeFlags Flags; - Flags.setExact(true); - Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt, &Flags); + Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt, false, false, + true); d = d.ashr(ShAmt); } |
