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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-24 20:59:14 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-24 20:59:14 +0000 |
| commit | 295e8b4e1223569b7760a38a6a482cc0b63f389e (patch) | |
| tree | cceb11d8d38dad3c48ae5a2362163adeeeb7e6ef /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | c0dbdb86c35f2d7d57e88090799759a9ec7a2157 (diff) | |
| download | bcm5719-llvm-295e8b4e1223569b7760a38a6a482cc0b63f389e.tar.gz bcm5719-llvm-295e8b4e1223569b7760a38a6a482cc0b63f389e.zip | |
[TargetLowering] SimplifyDemandedVectorElts - pass demanded elts through ADD/SUB ops
llvm-svn: 326044
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 36cb2cd963a..cb737dcd787 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1536,6 +1536,19 @@ bool TargetLowering::SimplifyDemandedVectorElts( } break; } + case ISD::ADD: + case ISD::SUB: { + APInt SrcUndef, SrcZero; + if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedElts, SrcUndef, + SrcZero, TLO, Depth + 1)) + return true; + if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, KnownUndef, + KnownZero, TLO, Depth + 1)) + return true; + KnownZero &= SrcZero; + KnownUndef &= SrcUndef; + break; + } case ISD::TRUNCATE: if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, KnownUndef, KnownZero, TLO, Depth + 1)) |
