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| author | Andrew Trick <atrick@apple.com> | 2014-01-13 20:08:27 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2014-01-13 20:08:27 +0000 |
| commit | 7daf6a45f416415e92568865d9ca7b42963d8d40 (patch) | |
| tree | abb4fc47c7031408ef3402947a5c64ecbcd48aec /llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | badf9e0f84a57e825ce1214a3a3f4bd10d867ff2 (diff) | |
| download | bcm5719-llvm-7daf6a45f416415e92568865d9ca7b42963d8d40.tar.gz bcm5719-llvm-7daf6a45f416415e92568865d9ca7b42963d8d40.zip | |
Hide the pre-RA-sched= option.
This is a very confusing option for a feature that will go away.
-enable-misched is exposed instead to help triage issues with the new
scheduler.
llvm-svn: 199133
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 2697a0cc9ca..f644fe3d4b9 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -213,7 +213,7 @@ MachinePassRegistry RegisterScheduler::Registry; static cl::opt<RegisterScheduler::FunctionPassCtor, false, RegisterPassParser<RegisterScheduler> > ISHeuristic("pre-RA-sched", - cl::init(&createDefaultScheduler), + cl::init(&createDefaultScheduler), cl::Hidden, cl::desc("Instruction schedulers available (before register" " allocation):")); |
