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authorChris Lattner <sabre@nondot.org>2006-10-24 17:03:35 +0000
committerChris Lattner <sabre@nondot.org>2006-10-24 17:03:35 +0000
commit3f179d24c687d45113c87391f9983e7cba7b240f (patch)
tree33d45e5536e5ffdf3f7a4d5b54439687a43bc216 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
parentaaeede0aa2977c7a177ff21271b3ef4f57473e25 (diff)
downloadbcm5719-llvm-3f179d24c687d45113c87391f9983e7cba7b240f.tar.gz
bcm5719-llvm-3f179d24c687d45113c87391f9983e7cba7b240f.zip
generalize 'CaseBlock'. It really allows any comparison to be inserted.
llvm-svn: 31161
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index fa4407def52..17ee59762ef 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -819,9 +819,8 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
/// visitSwitchCase - Emits the necessary code to represent a single node in
/// the binary search tree resulting from lowering a switch instruction.
void SelectionDAGLowering::visitSwitchCase(SelectionDAGISel::CaseBlock &CB) {
- SDOperand SwitchOp = getValue(CB.SwitchV);
- SDOperand CaseOp = getValue(CB.CaseC);
- SDOperand Cond = DAG.getSetCC(MVT::i1, SwitchOp, CaseOp, CB.CC);
+ SDOperand Cond = DAG.getSetCC(MVT::i1, getValue(CB.CmpLHS),
+ getValue(CB.CmpRHS), CB.CC);
// Set NextBlock to be the MBB immediately after the current one, if any.
// This is used to avoid emitting unnecessary branches to the next block.
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