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| author | Dale Johannesen <dalej@apple.com> | 2007-07-13 17:13:54 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2007-07-13 17:13:54 +0000 |
| commit | 2182f06f2d839cfb3575a2004d066086829365c0 (patch) | |
| tree | a8c33c8af491af6b1fcde76a885ec39074b6b393 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | |
| parent | f9aba2c2b470fc0926eccc8fe6ae8c7a921908ff (diff) | |
| download | bcm5719-llvm-2182f06f2d839cfb3575a2004d066086829365c0.tar.gz bcm5719-llvm-2182f06f2d839cfb3575a2004d066086829365c0.zip | |
Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
llvm-svn: 39816
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 373bce559d6..87bf2497640 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -73,9 +73,9 @@ MachinePassRegistry RegisterScheduler::Registry; namespace { cl::opt<RegisterScheduler::FunctionPassCtor, false, RegisterPassParser<RegisterScheduler> > - ISHeuristic("sched", + ISHeuristic("pre-RA-sched", cl::init(&createDefaultScheduler), - cl::desc("Instruction schedulers available:")); + cl::desc("Instruction schedulers available (before register allocation):")); static RegisterScheduler defaultListDAGScheduler("default", " Best scheduler for the target", |
