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authorJim Grosbach <grosbach@apple.com>2013-08-16 23:37:31 +0000
committerJim Grosbach <grosbach@apple.com>2013-08-16 23:37:31 +0000
commit06c2a681253e7ade487521b248233e01949014cd (patch)
treec694fc7afd4148d83d738d8f4411dd6f1fecd182 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
parentd69f3ed9479c8ff6a95d88a81b196ea467b96a6f (diff)
downloadbcm5719-llvm-06c2a681253e7ade487521b248233e01949014cd.tar.gz
bcm5719-llvm-06c2a681253e7ade487521b248233e01949014cd.zip
ARM: Fix more fast-isel verifier failures.
Teach the generic instruction selection helper functions to constrain the register classes of their input operands. For non-physical register references, the generic code needs to be careful not to mess that up when replacing references to result registers. As the comment indicates for MachineRegisterInfo::replaceRegWith(), it's important to call constrainRegClass() first. rdar://12594152 llvm-svn: 188593
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index e60adbf9e4e..17ccdb2bd5c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -497,6 +497,10 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
if (J == E) break;
To = J->second;
}
+ // Make sure the new register has a sufficiently constrained register class.
+ if (TargetRegisterInfo::isVirtualRegister(From) &&
+ TargetRegisterInfo::isVirtualRegister(To))
+ MRI.constrainRegClass(To, MRI.getRegClass(From));
// Replace it.
MRI.replaceRegWith(From, To);
}
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