summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
diff options
context:
space:
mode:
authorTim Northover <tnorthover@apple.com>2014-07-17 10:51:23 +0000
committerTim Northover <tnorthover@apple.com>2014-07-17 10:51:23 +0000
commitfd7e4249359f510d21c2b682176cdb28dfa4e7e4 (patch)
treec6f154b34d59f3708bea28534939101fdc74b37d /llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
parent2355066e4303a8c948ee9c7b8e3f28d778eb2180 (diff)
downloadbcm5719-llvm-fd7e4249359f510d21c2b682176cdb28dfa4e7e4.tar.gz
bcm5719-llvm-fd7e4249359f510d21c2b682176cdb28dfa4e7e4.zip
CodeGen: extend f16 conversions to permit types > float.
This makes the two intrinsics @llvm.convert.from.f16 and @llvm.convert.to.f16 accept types other than simple "float". This is only strictly needed for the truncate operation, since otherwise double rounding occurs and there's no way to represent the strict IEEE conversion. However, for symmetry we allow larger types in the extend too. During legalization, we can expand an "fp16_to_double" operation into two extends for convenience, but abort when the truncate isn't legal. A new libcall is probably needed here. Even after this commit, various target tweaks are needed to actually use the extended intrinsics. I've put these into separate commits for clarity, so there are no actual tests of f64 conversion here. llvm-svn: 213248
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
index b3a452f2148..a71cc6859ea 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
@@ -236,8 +236,8 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
case ISD::FP_TO_UINT: return "fp_to_uint";
case ISD::BITCAST: return "bitcast";
case ISD::ADDRSPACECAST: return "addrspacecast";
- case ISD::FP16_TO_FP32: return "fp16_to_fp32";
- case ISD::FP32_TO_FP16: return "fp32_to_fp16";
+ case ISD::FP16_TO_FP: return "fp16_to_fp";
+ case ISD::FP_TO_FP16: return "fp_to_fp16";
case ISD::CONVERT_RNDSAT: {
switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
OpenPOWER on IntegriCloud