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authorRenato Golin <renato.golin@linaro.org>2014-05-06 16:51:25 +0000
committerRenato Golin <renato.golin@linaro.org>2014-05-06 16:51:25 +0000
commitc7aea40ec67592a6be8314c509a9eae807daed5f (patch)
treef67c4be5aeb15e4b55d183401d904adb6fb84b16 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
parent52dc5d828fd75c7ec3ae82c5d5737e34a2a1b938 (diff)
downloadbcm5719-llvm-c7aea40ec67592a6be8314c509a9eae807daed5f.tar.gz
bcm5719-llvm-c7aea40ec67592a6be8314c509a9eae807daed5f.zip
Implememting named register intrinsics
This patch implements the infrastructure to use named register constructs in programs that need access to specific registers (bare metal, kernels, etc). So far, only the stack pointer is supported as a technology preview, but as it is, the intrinsic can already support all non-allocatable registers from any architecture. llvm-svn: 208104
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
index aebda04b8f0..d6b525500a8 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
@@ -93,6 +93,8 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
case ISD::RETURNADDR: return "RETURNADDR";
case ISD::FRAMEADDR: return "FRAMEADDR";
+ case ISD::READ_REGISTER: return "READ_REGISTER";
+ case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
case ISD::EH_RETURN: return "EH_RETURN";
case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
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