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| author | Craig Topper <craig.topper@gmail.com> | 2019-11-04 19:58:53 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2019-11-04 22:07:46 -0800 |
| commit | f65493a83e3bdb402fb1dfa92bcc25707e961147 (patch) | |
| tree | c2d35b679515fa7e4a0758a12f9797890bf1aa2d /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
| parent | abc04ff4012c62c98aa9f0d840114b2f56855dc8 (diff) | |
| download | bcm5719-llvm-f65493a83e3bdb402fb1dfa92bcc25707e961147.tar.gz bcm5719-llvm-f65493a83e3bdb402fb1dfa92bcc25707e961147.zip | |
[X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding.
Summary:
The 2 source operands commutable instructions are encoded in the
VEX.VVVV field and the r/m field of the MODRM byte plus the VEX.B
field.
The VEX.B field is missing from the 2-byte VEX encoding. If the
VEX.VVVV source is 0-7 and the other register is 8-15 we can
swap them to avoid needing the VEX.B field. This works as long as
the VEX.W, VEX.mmmmm, and VEX.X fields are also not needed.
Fixes PR36706.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68550
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
0 files changed, 0 insertions, 0 deletions
