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| author | Neil Henning <neil.henning@amd.com> | 2019-03-19 15:50:24 +0000 |
|---|---|---|
| committer | Neil Henning <neil.henning@amd.com> | 2019-03-19 15:50:24 +0000 |
| commit | e85f6bd64fbe0d0c21c64c60a7b34f7e173d009b (patch) | |
| tree | 479bae7e6fe3a5b92b8b794342da95372402f1bc /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
| parent | bda581b83126c73c8d150723151e204cf613a6e2 (diff) | |
| download | bcm5719-llvm-e85f6bd64fbe0d0c21c64c60a7b34f7e173d009b.tar.gz bcm5719-llvm-e85f6bd64fbe0d0c21c64c60a7b34f7e173d009b.zip | |
[AMDGPU] Ban i8 min3 promotion.
I found this really weird WWM-related case whereby through the WWM
transformations our isel lowering was trying to promote 2 min's into a
min3 for the i8 type, which our hardware doesn't support.
The new min3_i8.ll test case would previously spew the error:
PromoteIntegerResult #0: t69: i8 = SMIN3 t70, Constant:i8<0>, t68
Before the simple fix to our isel lowering to not do it for i8 MVT's.
Differential Revision: https://reviews.llvm.org/D59543
llvm-svn: 356464
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
0 files changed, 0 insertions, 0 deletions
