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author | Craig Topper <craig.topper@intel.com> | 2019-05-20 16:27:09 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-05-20 16:27:09 +0000 |
commit | af7a188453b0412de2149d9cc273fb3455774a2e (patch) | |
tree | 178b305dfe9a6eb800047f0e6752fdc102039846 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | |
parent | 203bfdd0f0d7fce8dd448140dbf6938c1ff068d5 (diff) | |
download | bcm5719-llvm-af7a188453b0412de2149d9cc273fb3455774a2e.tar.gz bcm5719-llvm-af7a188453b0412de2149d9cc273fb3455774a2e.zip |
[Intrinsics] Merge lround.i32 and lround.i64 into a single intrinsic with overloaded result type. Make result type for llvm.llround overloaded instead of fixing to i64
We shouldn't really make assumptions about possible sizes for long and long long. And longer term we should probably support vectorizing these intrinsics. By making the result types not fixed we can support vectors as well.
Differential Revision: https://reviews.llvm.org/D62026
llvm-svn: 361169
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 938aeafb435..33980040051 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -6034,18 +6034,16 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, getValue(I.getArgOperand(0)))); return; } - case Intrinsic::lround_i32: - case Intrinsic::lround_i64: + case Intrinsic::lround: case Intrinsic::llround: { unsigned Opcode; - MVT RetVT; switch (Intrinsic) { default: llvm_unreachable("Impossible intrinsic"); // Can't reach here. - case Intrinsic::lround_i32: Opcode = ISD::LROUND; RetVT = MVT::i32; break; - case Intrinsic::lround_i64: Opcode = ISD::LROUND; RetVT = MVT::i64; break; - case Intrinsic::llround: Opcode = ISD::LLROUND; RetVT = MVT::i64; break; + case Intrinsic::lround: Opcode = ISD::LROUND; break; + case Intrinsic::llround: Opcode = ISD::LLROUND; break; } + EVT RetVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); setValue(&I, DAG.getNode(Opcode, sdl, RetVT, getValue(I.getArgOperand(0)))); return; |