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author | Daniel Dunbar <daniel@zuster.org> | 2009-04-13 22:26:09 +0000 |
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committer | Daniel Dunbar <daniel@zuster.org> | 2009-04-13 22:26:09 +0000 |
commit | 097f630dada234f916dbcc233499d413f75964b8 (patch) | |
tree | c7a20f9acebd4fbe34227e03cdd36dcf26f02f1b /llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | |
parent | 92f056fadf7913416ce1813fdb3695ca8eead06e (diff) | |
download | bcm5719-llvm-097f630dada234f916dbcc233499d413f75964b8.tar.gz bcm5719-llvm-097f630dada234f916dbcc233499d413f75964b8.zip |
Make these errors more noticable in build logs.
llvm-svn: 68998
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index a7d7b5c0a87..0fc5cb13cf4 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -5145,8 +5145,8 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { Input.ConstraintVT.isInteger()) || (OpInfo.ConstraintVT.getSizeInBits() != Input.ConstraintVT.getSizeInBits())) { - cerr << "Unsupported asm: input constraint with a matching output " - << "constraint of incompatible type!\n"; + cerr << "llvm: error: Unsupported asm: input constraint with a " + << "matching output constraint of incompatible type!\n"; exit(1); } Input.ConstraintVT = OpInfo.ConstraintVT; @@ -5250,7 +5250,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { // Copy the output from the appropriate register. Find a register that // we can use. if (OpInfo.AssignedRegs.Regs.empty()) { - cerr << "Couldn't allocate output reg for constraint '" + cerr << "llvm: error: Couldn't allocate output reg for constraint '" << OpInfo.ConstraintCode << "'!\n"; exit(1); } @@ -5344,7 +5344,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode[0], hasMemory, Ops, DAG); if (Ops.empty()) { - cerr << "Invalid operand for inline asm constraint '" + cerr << "llvm: error: Invalid operand for inline asm constraint '" << OpInfo.ConstraintCode << "'!\n"; exit(1); } @@ -5376,7 +5376,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) { // Copy the input into the appropriate registers. if (OpInfo.AssignedRegs.Regs.empty()) { - cerr << "Couldn't allocate output reg for constraint '" + cerr << "llvm: error: Couldn't allocate output reg for constraint '" << OpInfo.ConstraintCode << "'!\n"; exit(1); } |