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author | Owen Anderson <resistor@mac.com> | 2012-08-13 23:32:49 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2012-08-13 23:32:49 +0000 |
commit | a40319b7f1640612dda14f1f4f46bed913299775 (patch) | |
tree | dd52d1730b23379f0d77311062c18c177db7b21e /llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
parent | 88fc73b8f7ff8187110cab0f3175bdf7a3a6c41b (diff) | |
download | bcm5719-llvm-a40319b7f1640612dda14f1f4f46bed913299775.tar.gz bcm5719-llvm-a40319b7f1640612dda14f1f4f46bed913299775.zip |
Add a roundToIntegral method to APFloat, which can be parameterized over various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC.
llvm-svn: 161807
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index d96f275d508..f4fe8927f69 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2483,6 +2483,24 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, case ISD::FABS: V.clearSign(); return getConstantFP(V, VT); + case ISD::FCEIL: { + APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); + if (fs == APFloat::opOK || fs == APFloat::opInexact) + return getConstantFP(V, VT); + break; + } + case ISD::FTRUNC: { + APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); + if (fs == APFloat::opOK || fs == APFloat::opInexact) + return getConstantFP(V, VT); + break; + } + case ISD::FFLOOR: { + APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); + if (fs == APFloat::opOK || fs == APFloat::opInexact) + return getConstantFP(V, VT); + break; + } case ISD::FP_EXTEND: { bool ignored; // This can return overflow, underflow, or inexact; we don't care. |