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author | Sanjay Patel <spatel@rotateright.com> | 2017-06-07 13:46:34 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2017-06-07 13:46:34 +0000 |
commit | 6e8e7cc70e32fa0a04891b22d85c7260676d0918 (patch) | |
tree | 41bd378955772bc3ec8d41be0e7ca9794eade7a6 /llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
parent | 6007000824f886ef69298abf0d5928381b6a1f9a (diff) | |
download | bcm5719-llvm-6e8e7cc70e32fa0a04891b22d85c7260676d0918.tar.gz bcm5719-llvm-6e8e7cc70e32fa0a04891b22d85c7260676d0918.zip |
[x86] avoid flipping sign bits for vector icmp by using known bits
If we know that both operands of an unsigned integer vector comparison are non-negative,
then it's safe to directly use a signed-compare-greater-than instruction (the only non-equality
integer vector compare predicate provided by SSE/AVX).
We're intentionally not changing the condition code to signed in order to preserve the
existing transforms that use min/max/psubus below here.
This should solve PR33276:
https://bugs.llvm.org/show_bug.cgi?id=33276
Differential Revision: https://reviews.llvm.org/D33862
llvm-svn: 304909
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
0 files changed, 0 insertions, 0 deletions