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| author | Nate Begeman <natebegeman@mac.com> | 2005-08-31 00:43:49 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2005-08-31 00:43:49 +0000 |
| commit | 539e7c892c5876122ee2a0b16c5be50189aab66d (patch) | |
| tree | 2404071c004713cf18ccba5af95a9948b349f79b /llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
| parent | d513d8a662e7c5e8628e0bed15614031497ce0f7 (diff) | |
| download | bcm5719-llvm-539e7c892c5876122ee2a0b16c5be50189aab66d.tar.gz bcm5719-llvm-539e7c892c5876122ee2a0b16c5be50189aab66d.zip | |
Sigh, not my day. Fix typo.
llvm-svn: 23166
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index aeacfd56884..a44854e9e89 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1099,7 +1099,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); case ISD::AssertZext: SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT()); - return (Mask & ((1ULL << SrcBits)-1) == 0; // Returning only the zext bits. + return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. case ISD::AND: // (X & C1) & C2 == 0 iff C1 & C2 == 0. if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) |
