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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-02-05 23:16:05 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-02-05 23:16:05 +0000
commit1b55dd9a81b20c861d46d5d9f4ee24e460822c8e (patch)
treec6153d6c99120205db97132aa94aa7b950f5e302 /llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
parent25793a3f2295397583aa9243d0a9d8676dd0c8a8 (diff)
downloadbcm5719-llvm-1b55dd9a81b20c861d46d5d9f4ee24e460822c8e.tar.gz
bcm5719-llvm-1b55dd9a81b20c861d46d5d9f4ee24e460822c8e.zip
Pass address space to allowsUnalignedMemoryAccesses
llvm-svn: 200888
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp8
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index febca623cdc..3ab8ad8bf15 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3633,8 +3633,9 @@ static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
DAG.getMachineFunction());
if (VT == MVT::Other) {
- if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
- TLI.allowsUnalignedMemoryAccesses(VT)) {
+ unsigned AS = 0;
+ if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
+ TLI.allowsUnalignedMemoryAccesses(VT, AS)) {
VT = TLI.getPointerTy();
} else {
switch (DstAlign & 7) {
@@ -3691,9 +3692,10 @@ static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
// FIXME: Only does this for 64-bit or more since we don't have proper
// cost model for unaligned load / store.
bool Fast;
+ unsigned AS = 0;
if (NumMemOps && AllowOverlap &&
VTSize >= 8 && NewVTSize < Size &&
- TLI.allowsUnalignedMemoryAccesses(VT, 0, &Fast) && Fast)
+ TLI.allowsUnalignedMemoryAccesses(VT, AS, &Fast) && Fast)
VTSize = Size;
else {
VT = NewVT;
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