Use a better idiom to silence compiler warnings.

llvm-svn: 51131

1 files changed, 5 insertions, 20 deletions

diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index bca279a97b2..70365e2babf 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -406,11 +406,8 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo,
     // Just use the input register directly!
     if (InstanceNo > 0)
       VRBaseMap.erase(SDOperand(Node, ResNo));
-#ifndef NDEBUG
     bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg));
-#else
-    VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo),SrcReg));
-#endif
+    isNew = isNew; // Silence compiler warning.
     assert(isNew && "Node emitted out of order - early");
     return;
   }
@@ -468,11 +465,8 @@ void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo,
 
   if (InstanceNo > 0)
     VRBaseMap.erase(SDOperand(Node, ResNo));
-#ifndef NDEBUG
   bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase));
-#else
-  VRBaseMap.insert(std::make_pair(SDOperand(Node,ResNo), VRBase));
-#endif
+  isNew = isNew; // Silence compiler warning.
   assert(isNew && "Node emitted out of order - early");
 }
 
@@ -529,11 +523,8 @@ void ScheduleDAG::CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
       MI->addOperand(MachineOperand::CreateReg(VRBase, true));
     }
 
-#ifndef NDEBUG
     bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,i), VRBase));
-#else
-    VRBaseMap.insert(std::make_pair(SDOperand(Node,i), VRBase));
-#endif
+    isNew = isNew; // Silence compiler warning.
     assert(isNew && "Node emitted out of order - early");
   }
 }
@@ -785,11 +776,8 @@ void ScheduleDAG::EmitSubregNode(SDNode *Node,
   } else
     assert(0 && "Node is not insert_subreg, extract_subreg, or subreg_to_reg");
      
-#ifndef NDEBUG
   bool isNew = VRBaseMap.insert(std::make_pair(SDOperand(Node,0), VRBase));
-#else
-  VRBaseMap.insert(std::make_pair(SDOperand(Node,0), VRBase));
-#endif
+  isNew = isNew; // Silence compiler warning.
   assert(isNew && "Node emitted out of order - early");
 }
 
@@ -1016,11 +1004,8 @@ void ScheduleDAG::EmitCrossRCCopy(SUnit *SU,
       // Copy from physical register.
       assert(I->Reg && "Unknown physical register!");
       unsigned VRBase = MRI.createVirtualRegister(SU->CopyDstRC);
-#ifndef NDEBUG
       bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase));
-#else
-      VRBaseMap.insert(std::make_pair(SU, VRBase));
-#endif
+      isNew = isNew; // Silence compiler warning.
       assert(isNew && "Node emitted out of order - early");
       TII->copyRegToReg(*BB, BB->end(), VRBase, I->Reg,
                         SU->CopyDstRC, SU->CopySrcRC);