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authorOwen Anderson <resistor@mac.com>2010-09-21 18:41:19 +0000
committerOwen Anderson <resistor@mac.com>2010-09-21 18:41:19 +0000
commitf4b1a5bdc48bb8ffa8574e949a227380d5ff5577 (patch)
tree775a4d81414f8b791c21c1f37f78906a3a1cd6a0 /llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
parentf7a8e93b76010b5715671324afb519d8418d381a (diff)
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When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
(sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold the intermediate AND and the ADD into a single SUB. This fixes <rdar://problem/8449754>. llvm-svn: 114460
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