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| author | Owen Anderson <resistor@mac.com> | 2011-03-07 18:29:47 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-03-07 18:29:47 +0000 |
| commit | cd526fa15ee81c25b6d67ed929f2a0b7b5a3ebba (patch) | |
| tree | 788276cc78a2a0f9e805293668eb8d11ca637aa2 /llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | |
| parent | db44611f2e71b4a2b3b340191dfda9a0506c425b (diff) | |
| download | bcm5719-llvm-cd526fa15ee81c25b6d67ed929f2a0b7b5a3ebba.tar.gz bcm5719-llvm-cd526fa15ee81c25b6d67ed929f2a0b7b5a3ebba.zip | |
Use the correct LHS type when determining the legalization of a shift's RHS type.
llvm-svn: 127163
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index f08528fe2dc..94080a04e39 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -948,7 +948,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // Legalizing shifts/rotates requires adjusting the shift amount // to the appropriate width. if (!Ops[1].getValueType().isVector()) - Ops[1] = LegalizeOp(DAG.getShiftAmountOperand(Ops[1])); + Ops[1] = LegalizeOp(DAG.getShiftAmountOperand(Ops[0].getValueType(), + Ops[1])); break; case ISD::SRL_PARTS: case ISD::SRA_PARTS: @@ -956,7 +957,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // Legalizing shifts/rotates requires adjusting the shift amount // to the appropriate width. if (!Ops[2].getValueType().isVector()) - Ops[2] = LegalizeOp(DAG.getShiftAmountOperand(Ops[2])); + Ops[2] = LegalizeOp(DAG.getShiftAmountOperand(Ops[0].getValueType(), + Ops[2])); break; } |
