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authorDuncan Sands <baldrick@free.fr>2011-05-18 09:21:57 +0000
committerDuncan Sands <baldrick@free.fr>2011-05-18 09:21:57 +0000
commit7f64656d212f2535bb19c10daa4c02c93809219d (patch)
treeacf6395a005dddba165cec3d0ce11b1dc8ce0cd3 /llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
parenta8514535a4d5b4a387db59919c4b919aaa7f699a (diff)
downloadbcm5719-llvm-7f64656d212f2535bb19c10daa4c02c93809219d.tar.gz
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Tighten up checking of the validity of casts. (1) The IR parser would
happily accept things like "sext <2 x i32> to <999 x i64>". It would also accept "sext <2 x i32> to i64", though the verifier would catch that later. Fixed by having castIsValid check that vector lengths match except when doing a bitcast. (2) When creating a cast instruction, check that the cast is valid (this was already done when creating constexpr casts). While there, replace getScalarSizeInBits (used to allow more vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable since vector to vector casts are now handled explicitly by passing to the element types; i.e. this bit should result in no functional change. llvm-svn: 131532
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
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