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author | Chris Lattner <sabre@nondot.org> | 2007-04-28 06:42:38 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2007-04-28 06:42:38 +0000 |
commit | 1deacd61f4a93742e3e12bac91026158bdb1aaf0 (patch) | |
tree | 2ca78b8a8f5e03a9d811ea05e0ca4de74d840f6d /llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | |
parent | 5f59451529567b3feef943507ec3e2e6fabda90c (diff) | |
download | bcm5719-llvm-1deacd61f4a93742e3e12bac91026158bdb1aaf0.tar.gz bcm5719-llvm-1deacd61f4a93742e3e12bac91026158bdb1aaf0.zip |
memory inputs to an inline asm are required to have an address available.
If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.
This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
llvm-svn: 36536
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 99394c73a39..cc8cc61cb19 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3123,11 +3123,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { // slots and always reusing the same one. We currently always create // new ones, as reuse may inhibit scheduling. const Type *Ty = MVT::getTypeForValueType(ExtraVT); - unsigned TySize = (unsigned)TLI.getTargetData()->getTypeSize(Ty); + uint64_t TySize = TLI.getTargetData()->getTypeSize(Ty); unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(Ty); MachineFunction &MF = DAG.getMachineFunction(); int SSFI = - MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align); + MF.getFrameInfo()->CreateStackObject(TySize, Align); SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); Result = DAG.getTruncStore(DAG.getEntryNode(), Node->getOperand(0), StackSlot, NULL, 0, ExtraVT); |