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author | Craig Topper <craig.topper@intel.com> | 2018-10-13 17:47:20 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-10-13 17:47:20 +0000 |
commit | 189e5b4ab689a854e9e67c3288810c15b8f95923 (patch) | |
tree | 10345786d118f687d380fa8fcd119614966dc05a /llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | |
parent | ffde98de21dd9ab179cb903109daab01714e6431 (diff) | |
download | bcm5719-llvm-189e5b4ab689a854e9e67c3288810c15b8f95923.tar.gz bcm5719-llvm-189e5b4ab689a854e9e67c3288810c15b8f95923.zip |
[LegalizeTypes] Prevent an assertion from PromoteIntRes_BSWAP and PromoteIntRes_BITREVERSE if the shift amount is too large for the VT returned by getShiftAmountTy
Summary:
getShiftAmountTy for X86 returns MVT::i8. If a BSWAP or BITREVERSE is created that requires promotion and the difference between the original VT and the promoted VT is more than 255 then we won't able to create the constant.
This patch adds a check to replace the result from getShiftAmountTy to MVT::i32 if the difference won't fit. This should get legalized later when the shift is ultimately expanded since its clearly an illegal type that we're only promoting to make it a power of 2 bit width. Alternatively we could base the decision completely on the largest shift amount the promoted VT could use.
Vectors should be immune here because getShiftAmountTy always returns the incoming VT for vectors. Only the scalar shift amount can be changed by the targets.
Reviewers: eli.friedman, RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53232
llvm-svn: 344460
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
0 files changed, 0 insertions, 0 deletions