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authorHal Finkel <hfinkel@anl.gov>2013-08-07 22:49:12 +0000
committerHal Finkel <hfinkel@anl.gov>2013-08-07 22:49:12 +0000
commit171817ee8ae888d595734a1b911d77dfa235ec9e (patch)
tree75c05d10cf1b0a9cb2417b4b6119abd66b0383b4 /llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
parentc377275a4a0ac50671f6eb2e1927a5a9be262153 (diff)
downloadbcm5719-llvm-171817ee8ae888d595734a1b911d77dfa235ec9e.tar.gz
bcm5719-llvm-171817ee8ae888d595734a1b911d77dfa235ec9e.zip
Add ISD::FROUND for libm round()
All libm floating-point rounding functions, except for round(), had their own ISD nodes. Recent PowerPC cores have an instruction for round(), and so here I'm adding ISD::FROUND so that round() can be custom lowered as well. For the most part, this is straightforward. I've added an intrinsic and a matching ISD node just like those for nearbyint() and friends. The SelectionDAG pattern I've named frnd (because ISD::FP_ROUND has already claimed fround). This will be used by the PowerPC backend in a follow-up commit. llvm-svn: 187926
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index bd844e599f1..1c062f14227 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3231,6 +3231,13 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node) {
RTLIB::NEARBYINT_F128,
RTLIB::NEARBYINT_PPCF128));
break;
+ case ISD::FROUND:
+ Results.push_back(ExpandFPLibCall(Node, RTLIB::ROUND_F32,
+ RTLIB::ROUND_F64,
+ RTLIB::ROUND_F80,
+ RTLIB::ROUND_F128,
+ RTLIB::ROUND_PPCF128));
+ break;
case ISD::FPOWI:
Results.push_back(ExpandFPLibCall(Node, RTLIB::POWI_F32, RTLIB::POWI_F64,
RTLIB::POWI_F80, RTLIB::POWI_F128,
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