diff options
author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-20 18:08:09 +0000 |
---|---|---|
committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-12-20 18:08:09 +0000 |
commit | b109a7b430a9af52c54a08fd21bbcab7ffb6aab7 (patch) | |
tree | 240bd81e53823b338fad5835c3d0e0e26423aeb6 /llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h | |
parent | f623e9870da40000405fe8f008a7a01f28ae32a8 (diff) | |
download | bcm5719-llvm-b109a7b430a9af52c54a08fd21bbcab7ffb6aab7.tar.gz bcm5719-llvm-b109a7b430a9af52c54a08fd21bbcab7ffb6aab7.zip |
Use MachineInstrBuilder in InstrEmitter.
This is supposed to be a mechanical change with no functional effects.
InstrEmitter can generate all types of MachineOperands which revealed
that MachineInstrBuilder was missing a few methods, added by this patch.
Besides providing a context pointer to MI::addOperand(),
MachineInstrBuilder seems like a better fit for this code.
llvm-svn: 170712
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h index 8168bd96ae6..a9c2203e840 100644 --- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h +++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h @@ -22,6 +22,7 @@ namespace llvm { +class MachineInstrBuilder; class MCInstrDesc; class SDDbgValue; @@ -48,7 +49,8 @@ class InstrEmitter { unsigned getDstOfOnlyCopyToRegUse(SDNode *Node, unsigned ResNo) const; - void CreateVirtualRegisters(SDNode *Node, MachineInstr *MI, + void CreateVirtualRegisters(SDNode *Node, + MachineInstrBuilder &MIB, const MCInstrDesc &II, bool IsClone, bool IsCloned, DenseMap<SDValue, unsigned> &VRBaseMap); @@ -61,7 +63,8 @@ class InstrEmitter { /// AddRegisterOperand - Add the specified register as an operand to the /// specified machine instr. Insert register copies if the register is /// not in the required register class. - void AddRegisterOperand(MachineInstr *MI, SDValue Op, + void AddRegisterOperand(MachineInstrBuilder &MIB, + SDValue Op, unsigned IIOpNum, const MCInstrDesc *II, DenseMap<SDValue, unsigned> &VRBaseMap, @@ -71,7 +74,8 @@ class InstrEmitter { /// specifies the instruction information for the node, and IIOpNum is the /// operand number (in the II) that we are adding. IIOpNum and II are used for /// assertions only. - void AddOperand(MachineInstr *MI, SDValue Op, + void AddOperand(MachineInstrBuilder &MIB, + SDValue Op, unsigned IIOpNum, const MCInstrDesc *II, DenseMap<SDValue, unsigned> &VRBaseMap, |