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authorPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-13 06:34:11 +0000
committerPatrik Hagglund <patrik.h.hagglund@ericsson.com>2012-12-13 06:34:11 +0000
commit5e6c361bc068a8b4997891dbfa74d08b52fb5458 (patch)
tree08b1065e128353f4902d04695a7fca717510dcad /llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
parent07bb3925b019869b4e00dcee2070a5bbc5639b77 (diff)
downloadbcm5719-llvm-5e6c361bc068a8b4997891dbfa74d08b52fb5458.tar.gz
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Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.
Accordingly, add helper funtions getSimpleValueType (in parallel to getValueType) in SDValue, SDNode, and TargetLowering. This is the first, in a series of patches. This is the second attempt. In the first attempt (r169837), a few getSimpleVT() were hoisted too far, detected by bootstrap failures. llvm-svn: 170104
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
index 9bfb51db8c7..8168bd96ae6 100644
--- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
+++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
@@ -81,7 +81,7 @@ class InstrEmitter {
/// supports SubIdx sub-registers. Emit a copy if that isn't possible.
/// Return the virtual register to use.
unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
- EVT VT, DebugLoc DL);
+ MVT VT, DebugLoc DL);
/// EmitSubregNode - Generate machine code for subreg nodes.
///
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