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authorOwen Anderson <resistor@mac.com>2008-08-26 18:51:24 +0000
committerOwen Anderson <resistor@mac.com>2008-08-26 18:51:24 +0000
commite0ac9765b26b32d7203550aeb17018bc78d23992 (patch)
tree6d377fe2ba7f8747401a5523b97f7ebc2cf331b8 /llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
parent42ccd39689e7fcfcd2f3e15ea9b899eb7ea27dec (diff)
downloadbcm5719-llvm-e0ac9765b26b32d7203550aeb17018bc78d23992.tar.gz
bcm5719-llvm-e0ac9765b26b32d7203550aeb17018bc78d23992.zip
Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts,
allowing it to support the full range of conversions people might ask for in a correct manner. llvm-svn: 55378
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/FastISel.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/FastISel.cpp27
1 files changed, 19 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
index 387929e751a..cc30e321147 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -251,19 +251,30 @@ FastISel::SelectInstructions(BasicBlock::iterator Begin,
// Unhandled type. Halt "fast" selection and bail.
return I;
- // Otherwise, insert a register-to-register copy.
- TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT);
- TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT);
unsigned Op0 = ValueMap[I->getOperand(0)];
- unsigned ResultReg = createResultReg(DstClass);
-
if (Op0 == 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
- bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
- Op0, DstClass, SrcClass);
- if (!InsertedCopy)
+ // First, try to perform the bitcast by inserting a reg-reg copy.
+ unsigned ResultReg = 0;
+ if (SrcVT.getSimpleVT() == DstVT.getSimpleVT()) {
+ TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT);
+ TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT);
+ ResultReg = createResultReg(DstClass);
+
+ bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
+ Op0, DstClass, SrcClass);
+ if (!InsertedCopy)
+ ResultReg = 0;
+ }
+
+ // If the reg-reg copy failed, select a BIT_CONVERT opcode.
+ if (!ResultReg)
+ ResultReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(),
+ ISD::BIT_CONVERT, Op0);
+
+ if (!ResultReg)
return I;
ValueMap[I] = ResultReg;
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