make UpdateValueMap handle the possiblity that we could be

copying into the right register, avoiding a copy.

llvm-svn: 68889

1 files changed, 1 insertions, 1 deletions

diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
index 7e300536748..251e96a771c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -158,7 +158,7 @@ unsigned FastISel::UpdateValueMap(Value* I, unsigned Reg) {
   unsigned &AssignedReg = ValueMap[I];
   if (AssignedReg == 0)
     AssignedReg = Reg;
-  else {
+  else if (Reg != AssignedReg) {
     const TargetRegisterClass *RegClass = MRI.getRegClass(Reg);
     TII.copyRegToReg(*MBB, MBB->end(), AssignedReg,
                      Reg, RegClass, RegClass);