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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-07-10 22:17:40 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-07-10 22:17:40 +0000 |
commit | f54dc2384d6962327baf3f8b1735a5d62bdeea7e (patch) | |
tree | f98007a63fa2cc247db681900766c3a5233f0d62 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
parent | f862f87ff219206e03d56512b788bc5f61c78541 (diff) | |
download | bcm5719-llvm-f54dc2384d6962327baf3f8b1735a5d62bdeea7e.tar.gz bcm5719-llvm-f54dc2384d6962327baf3f8b1735a5d62bdeea7e.zip |
DAGCombiner: Assume invariant load cannot alias a store
The motivation is to allow GatherAllAliases / FindBetterChain
to not give up on dependent loads of a pointer from constant memory.
This is important for AMDGPU, because most loads are pointers
derived from a load of a kernel argument from constant memory.
llvm-svn: 241948
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index e05714342d2..52d620b1d54 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -13844,6 +13844,15 @@ bool DAGCombiner::isAlias(LSBaseSDNode *Op0, LSBaseSDNode *Op1) const { // If they are both volatile then they cannot be reordered. if (Op0->isVolatile() && Op1->isVolatile()) return true; + // If one operation reads from invariant memory, and the other may store, they + // cannot alias. These should really be checking the equivalent of mayWrite, + // but it only matters for memory nodes other than load /store. + if (Op0->isInvariant() && Op1->writeMem()) + return false; + + if (Op1->isInvariant() && Op0->writeMem()) + return false; + // Gather base node and offset information. SDValue Base1, Base2; int64_t Offset1, Offset2; |