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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-21 22:47:27 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-21 22:47:27 +0000 |
| commit | f0a4823b919a07a53bf8e5b4e5f5f4a75660f29e (patch) | |
| tree | 89071f88a6ead020f0aa937bcb2ebc3bcf22275c /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | |
| parent | 40aefb5fe0252c4f8aedea385933c8db5a71441f (diff) | |
| download | bcm5719-llvm-f0a4823b919a07a53bf8e5b4e5f5f4a75660f29e.tar.gz bcm5719-llvm-f0a4823b919a07a53bf8e5b4e5f5f4a75660f29e.zip | |
DAG: Check if extract_vector_elt is legal or custom
Avoids test regressions in future AMDGPU commits when
more vector types are custom lowered.
llvm-svn: 295782
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 694ca96176a..f8e18e22f65 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -7882,7 +7882,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) { EVT SrcVT = VecSrc.getValueType(); if (SrcVT.isVector() && SrcVT.getScalarType() == VT && (!LegalOperations || - TLI.isOperationLegal(ISD::EXTRACT_VECTOR_ELT, SrcVT))) { + TLI.isOperationLegalOrCustom(ISD::EXTRACT_VECTOR_ELT, SrcVT))) { SDLoc SL(N); EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout()); |
