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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-03-07 21:10:09 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-03-07 21:10:09 +0000
commitceb2c06cbd20ed7288615188fe20a84a311b0818 (patch)
tree42df1d3fe58d30241231c40cd210c1885c891f9d /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
parent5a9a42778ab565913b6c1b66c4e15cfa80b7a610 (diff)
downloadbcm5719-llvm-ceb2c06cbd20ed7288615188fe20a84a311b0818.tar.gz
bcm5719-llvm-ceb2c06cbd20ed7288615188fe20a84a311b0818.zip
DAGCombiner: Check legality before creating extract_vector_elt
Problem not hit by any in tree target. llvm-svn: 262852
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 36af244c2b8..b7c468a9579 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -7207,7 +7207,9 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
if (N0.getOpcode() == ISD::BITCAST && !VT.isVector()) {
SDValue VecSrc = N0.getOperand(0);
EVT SrcVT = VecSrc.getValueType();
- if (SrcVT.isVector() && SrcVT.getScalarType() == VT) {
+ if (SrcVT.isVector() && SrcVT.getScalarType() == VT &&
+ (!LegalOperations ||
+ TLI.isOperationLegal(ISD::EXTRACT_VECTOR_ELT, SrcVT))) {
SDLoc SL(N);
EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
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