summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff options
context:
space:
mode:
authorChad Rosier <mcrosier@codeaurora.org>2016-10-12 13:41:38 +0000
committerChad Rosier <mcrosier@codeaurora.org>2016-10-12 13:41:38 +0000
commitc215c3fd143d11f6fd051b5556b04970f9888381 (patch)
tree875b56195be8bda65f81fc56bbb753a4ceb5b785 /llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
parentb271a58e377f7aeb761945dc02aff7041a1ef44b (diff)
downloadbcm5719-llvm-c215c3fd143d11f6fd051b5556b04970f9888381.tar.gz
bcm5719-llvm-c215c3fd143d11f6fd051b5556b04970f9888381.zip
[CVP] Convert an AShr to a LShr if 1st operand is known to be nonnegative.
An arithmetic shift can be safely changed to a logical shift if the first operand is known positive. This allows ComputeKnownBits (and similar analysis) to determine the sign bit of the shifted value in some cases. In turn, this allows InstCombine to canonicalize a signed comparison (a > 0) into an equality check (a != 0). PR30577 Differential Revision: https://reviews.llvm.org/D25119 llvm-svn: 284013
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud